82870P2P64H2 Datasheet, PDF (124/217 Pages) –

Functional Description
R
4.2
PCI-X Interface
Both of the P64H2 PCI interfaces support PCI-X. This section does not describe the PCI-X
protocol. Rather, it describes the P64H2 behavior in areas of the specification that are open to
interpretation. For a detailed description, refer to the PCI-X Addendum to the PCI Local Bus
Specification, Revision 1.0.
Unless otherwise noted in this section, the P64H2 follows all rules of the PCI-X Addendum to the
PCI Local Bus Specification, Revision 1.0.
4.2.1 Command Encoding
Table 23 lists the PCI-X commands supported by the P64H2.
Table 23. Command Encoding
Type of Transaction
0000
Interrupt
acknowledge
0001 Special cycle
Intel P64H2 As
Master Target
No
No
No
No
0010 I/O read
Yes
No
0011 I/O write
Yes
No
0100 Reserved
No
No
0101 Reserved
No
No
0110
Memory Read
DWord
Yes
Yes
0111 Memory Write
Yes
Yes
Type of Transaction
1000
1001
1010
1011
1100
1101
1110
1111
Alias to Memory
Read Block
Alias to Memory
Write Block
Configuration
Read
Configuration
Write
Split Completion
Dual Address
Cycle
Memory Read
Block
Memory Write
Block
Intel P64H2 As
Master Target
No
Yes
No
Yes
Yes
No
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
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Intel^® 82870P2 P64H2 Datasheet