82870P2P64H2 Datasheet, PDF (67/217 Pages) –

Register Description
R
3.2.47
HCCR—Hub Interface Command/Control Register
(D29,31: F0)
Offset:
F0–F3h
Default Value: 00000000h
Attribute:
Size:
R/W, RO
32 bits
Bits
Description
31:20
19:16
15:06
5
4
3:1
0
Reserved
Hub Interface Time Slice (HITS)—R/W. Only the value from PCI bus A (Device 31) will be used.
This field sets the hub interface arbiter time-slice value with a 4 base-clock granularity. A value of
0h means that the time-slice is immediately expired and that the Intel® P64H2 will allow the other
master's request to be serviced after every message.
Reserved
ECC Mode (ECC)—RO. Only the value from PCI bus A (Device 31) is valid. This bit indicates
whether the P64H2 is operating in ECC mode or in parity mode. It is set at reset based upon the
ECC negotiation.
0 = Parity Mode
1 = ECC mode
Reserved
Maximum Data Size (MAXD)—R/W. Only the value from PCI bus A (Device 31) will be used.
This field specifies the maximum size write a master should request in a single burst, as well as
the maximum optimal size read completion a target should return.
000 = 32 Bytes
001 = 64 Bytes
Others = 128 Bytes
Reserved
Intel^® 82870P2 P64H2 Datasheet
67