82870P2P64H2 Datasheet, PDF (12/217 Pages) –

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Table 51. Immediate Terminations of Posted Write Cycles to PCI/PCI-X ...................... 158
Table 52. Split Terminations of Completion Required Cycles to PCI-X .......................... 158
Table 53. Hub Interface Response to PCI-X Split Completion Terminations of
Completion Required Cycles ................................................................................... 159
Table 54. Terminations of Completion Required Cycles to Hub Interface...................... 159
Table 55. System Bus Delivery Address Format ............................................................ 161
Table 56. System Bus Delivery Data Format.................................................................. 161
Table 57. SMBus Address Configuration........................................................................ 163
Table 58. P64H2 Clocking .............................................................................................. 171
Table 59. Determining PCI/PCI-X Bus Frequency.......................................................... 173
Table 60. Hot Plug Mode and Final Bus State ................................................................ 173
Table 61. RAS_STS Register (offset 60h) Values .......................................................... 179
Table 62. Intel^® P64H2 DC Voltage Characteristics ....................................................... 180
Table 63. Intel^® P64H2 DC Current Characteristics ....................................................... 180
Table 64. DC Characteristics Input Signal Association .................................................. 181
Table 65. DC Input Characteristics................................................................................. 181
Table 66. DC Characteristic Output Signal Association ................................................. 182
Table 67. DC Output Characteristics .............................................................................. 183
Table 68. Other DC Characteristics................................................................................ 183
Table 69. DC Characteristics for Hub Interface Common Clock Signaling .................... 184
Table 70. DC Characteristics for Hub Interface Source Synchronous Signaling............ 185
Table 71. DC Characteristics for PCI 5 V Signaling........................................................ 185
Table 72. DC Characteristics for PCI 3.3 V Signaling..................................................... 186
Table 73. DC Characteristics for PCI-X .......................................................................... 186
Table 74. PCI Hot Plug Slot Power Requirements ......................................................... 187
Table 75. DC Characteristics for Input Clock Signals..................................................... 187
Table 76. DC Characteristics for Output Clock Signals .................................................. 188
Table 77. PCI Interface Timing (HI_VREF = 5 V + 5%, VCC = 3.3 V + 5%, Tcase=0°C to
105°C)...................................................................................................................... 189
Table 78. PCI Clock Characteristics (HI_VREF = 5 V + 5%, VCC = 3.3 V + 5%,
Tcase=0 °C to 105 °C)............................................................................................. 191
Table 79. PCI Clock Skew Parameters (HI_VREF = 5 V + 5%, VCC = 3.3 V + 5%,
Tcase=0°C to 105°C)............................................................................................... 192
Table 80. PCI-X General Timing Parameters (HI_VREF = 5 V + 5%, VCC = 3.3 V + 5%,
Tcase=0°C to 105°C)............................................................................................... 193
Table 81. PCI-X Clock Timings (HI_VREF = 5 V + 5%, VCC = 3.3 V + 5%, Tcase=0°C to
105°C)...................................................................................................................... 195
Table 82. PCI-X Clock Uncertainty Parameters (HI_VREF = 5 V + 5%, VCC = 3.3 V
+ 5%, Tcase=0°C to 105°C) .................................................................................... 196
Table 83. P64H2 Clock Timings (HI_VREF = 5 V + 5%, VCC = 3.3 V + 5%, Tcase=0°C to
105°C)...................................................................................................................... 197
Table 84. Intel^® P64H2 Ballout Listed Alphabetically by Signal Name............................ 204
Table 85. Intel^® P64H2 Hub Interface Package Trace Lengths...................................... 213
Table 86. XOR Power Up Strap (Sampled during RESET) ............................................ 215
Table 87. XOR Chain Table (Chains 1–6) ...................................................................... 215
Table 88. Pins Excluded from XOR Chain Testing......................................................... 217
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Intel^® 82870P2 P64H2 Datasheet