82870P2P64H2 Datasheet, PDF (62/217 Pages) –

Register Description
R
3.2.39
RAS_HAH—RAS Hub Interface Address High 32 Bits
Register (D29,31: F0)
Offset:
88–8Bh
Default Value: xxxxxxxxh
Attribute:
Size:
RO
32 bits
This register contains information from the high 32 bits of the hub interface packet address.
Bits
Description
High 32-bits of Address (ADR). This field is only visible from device 31. The field contains the
high 32-bits of the address from the hub interface header. On read completion packets, where
31:0 the hub interface agent transmits no address, the perceived destination (based upon the Hub
ID / Pipe ID) is used. This field is only valid if the AEHM, AEHS, DEHM, DEHS, HTA, or HMA
bits are set in the RAS_STS Register (60h).
3.2.40
RAS_HP—RAS Hub Interface Prefetch Horizon Register
(D29,31: F0)
Offset:
8C–8Fh
Default Value: xxxxxxxxh
Attribute:
Size:
RO
32 bits
This register contains the information from the prefetch horizon field of the packet. This represents
the entire 32-bit field, not just the valid bits from the horizon.
Bits
Description
Prefetch Hint (Hint). This field is only visible from device 31. The field contains the prefetch hint
transmitted on the hub interface. Even though only various bits of this field are valid as prefetch
31:0 hint, since ECC and parity are calculated over the entire range, all bits must be captured when
there is an error. This field is only valid if the AEHM, AEHS, DEHM, DEHS, HTA, or HMA bits are
set in the RAS_STS Register (60h).
3.2.41
RAS_D0—RAS Hub Interface DWord 0 Register
(D29,31: F0)
Offset:
90–93h
Default Value: xxxxxxxxh
Attribute:
Size:
RO
32 bits
Bits
Description
DWord 0 (D0). This field is only visible from Device 31. The field contains the 1^st DWord of data
31:0 received from the hub interface. This field is only valid if the DEHM or DEHS bits are set in the
RAS_STS Register (60h).
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Intel^® 82870P2 P64H2 Datasheet