82870P2P64H2 Datasheet, PDF (177/217 Pages) –

Functional Description
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All errors are logged in PCI configuration space for the bridge, at offsets 60h to 8Fh. All bits in
these registers are sticky through reset. Bits [5:0] of offset 60h are the fatal error class status bits,
and bits [13:8] of offset 60h are the non-fatal error class status bits. One and only one of these bits
may be set at any time. These bits must be cleared by BIOS upon a power-up reset, to ensure that
at power-up there are no errors logged. By making these bits sticky through reset, if an SERR# is
signaled and the system reboots, causing PCIRST# to be asserted, the error will remain intact.
• Software (either from platform BIOS or a system management controller using SMBus) must
deal with fatal errors that override non-fatal errors. The following algorithm is suggested. This
is not to imply a solution set, but to show how the hardware provided allows software to
determine the exact error: Check the non-fatal status bits (bits [13:8] of offset 60h) to see if it
is a non-fatal error. If one of these bits is set, set a variable to remember that this error could
be overridden. The P64H2 hardware will ensure that only one of these bits is set.
• Check the fatal status bits (bits [5:0] of offset 60h) to see if it is a non-fatal error. If one of
these bits is set, clear the “could be overridden” variable. This implies that between the time
software read the non-fatal status bits and the fatal status bits, a fatal error occurred that
overrode the non-fatal error. Hardware will ensure that only one of these bits is set.
• Read the RAS registers to determine the address and data of the error, based upon the status
bits.
• If the “could be overridden” status bit is set, read the fatal error status bits again. If one of
these is now set, it means between the time software started reading the RAS registers and
now, a fatal error occurred. The RAS registers cannot be trusted because they could have been
overwritten. Re-read the RAS registers.
• Clear the status bit that caused the failure by writing a 1.
Below is a summary list of the rules for the types of errors logged by the P64H2:
• For hub interface, the logged errors are:
 Outbound Write/Read ECC error on header: Corrupted header
 Outbound Write ECC Error on data: Good header and corrupted data
 Inbound Read Completion Error on completion header: Corrupted completion header
 Inbound Read Completion Error on completion data: Good request (not completion)
header and corrupted data
• For PCI, the logged errors are:
 Outbound Write/Read Parity Error on address attributes: Corrupted address/attributes
 Outbound Write Parity Error on data: Good address and corrupted data
 Inbound Read Completion Error on completion address attributes: Corrupted completion
address/attributes
 Inbound Read Completion Error on completion data: Good request (not completion)
address/attributes and corrupted data
Intel^® 82870P2 P64H2 Datasheet
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