82870P2P64H2 Datasheet, PDF (30/217 Pages) –

Signal Description
R
Signal
HPA_SOC
HPA_SOL
HPA_SOLR
HPA_SOD
HPA_SLOT [2:0]
Type
O
O
O
O
I
Description
Serial Output Clock: This signal is normally high. It pulses low to shift
internal serial output shift register data one bit position. (The shift
registers should be similar to standard “74x164” series).
Serial Output Non-Reset Latch Load: This signal is normally high. It
pulses low to clock external latches (power-enable, clock-enable, slot
bus-enable, and LED latches). The high edge acts as the clock.
Serial Output Reset Latch Load: This signal is normally high. It pulses
high to clock external latches (Reset latches) reading the serial output
shift registers. The high edge acts as the clock.
Serial Output Data: Data is shifted out to external logic on HPA_SOC.
Number of Hot Plug Slots: Input strap to denote number of hot plug
slots. The straps should be pulled high or low to indicate a binary
encoded value, the number of hot plug slots in the system. They should
be pulled up to 3.3 V or down to Ground with an 8.2 kΩ resistor.
Table 10. Hot Plug Interface B Signals
Signal
HPB_SIC
HPB_SIL#
HPB_SID
HPB_SOR#
HPB_SORR#
HPB_SOC
HPB_SOL
HPB_SOLR
HPB_SOD
HPB_SLOT [2:0]
Type
O
O
I
O
O
O
O
O
O
I
Description
Serial Input Clock: This signal is normally high. It pulses low to shift
external serial input shift register data one bit position. (The shift
registers should be similar to standard “74x165” series).
Serial Input Load: This signal is normally high. It pulses low to
synchronously parallel load external serial input shift registers on the next
rising edge of HPB_SIC.
Serial Input Data: Data shifted in from external logic on HPB_SIC.
Serial Output Non-Reset Latch Clear: This signal is normally high. It
asynchronously clears the power-enable, clock-enable, slot bus-enable,
and LED latches.
Serial Output Reset Latch Clear: This signal is normally high. It
asynchronously clears the PCI slot reset latches.
Serial Output Clock: This signal is normally high. It pulses low to shift
internal serial output shift register data one bit position. (The shift
registers should be similar to standard “74x164” series).
Serial Output Non-Reset Latch Load: This signal is normally high. It
pulses low to clock external latches (power-enable, clock-enable, slot
bus-enable, and LED latches). The high edge acts as the clock.
Serial Output Reset Latch Load: This signal is normally high. It pulses
high to clock external latches (Reset latches) reading the serial output
shift registers. The high edge acts as the clock.
Serial Output Data: Data shifted out to external logic on HPB_SOC.
Number of Hot Plug Slots: Input strap to denote number of hot plug
slots. The straps should be pulled high or low to indicate a binary
encoded value, the number of hot plug slots in the system. They should
be pulled up to 3.3 V or down to ground with an 8.2 kΩ resistor.
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Intel^® 82870P2 P64H2 Datasheet