82870P2P64H2 Datasheet, PDF (101/217 Pages) –

Register Description
R
3.4.2 Direct Memory Space Registers
These I/OxAPIC registers are located in processor memory space. The IDX and WND Registers
are used to access the I/OxAPIC’s Indirect Memory Space registers (see Section 3.4.3). The offset
addresses listed in Table 19 are offset from the base address programmed in the MBAR Register
(PCI offset 10h).
Table 19. I/OxAPIC Memory Space Register Map
Offset
Address
00h
10–13h
20h
40h
Symbo
l
Full Name
IDX
WND
PAR
EOI
Index Register
Window Register
IRQ Pin Assertion Register
EOI Register
Default
00h
00000000h
xxh
xxh
3.4.2.1
IDX—Index Register (D28,30: F0)
Offset:
00h
Default Value: 00h.
Attribute:
Size:
R/W
8 bits
The Index Register selects which indirect register appears in the window register to be
manipulated by software. Software programs this register to select the desired APIC internal
register.
Bits
Description
7:0 Index (IDX). Indirect register to access.
3.4.2.2
WND—Window Register (D28,30: F0)
Offset:
10–13h
Default Value: 00000000h
Attribute:
Size:
R/W
32 bits
This is a 32-bit register specifying the data to be read or written to the register pointed to by the
Register Select Register. This register can be accessed in byte quantities.
Bits
Description
31:0
Window (WND). Data to be written to the indirect register on writes, and location of register data
from the indirect register on reads.
Intel^® 82870P2 P64H2 Datasheet
101