82870P2P64H2 Datasheet, PDF (117/217 Pages) –

Functional Description
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Type 1 to Type 1 Forwarding
The P64H2 forwards a type 1-configuration cycle unchanged to the PCI bus under the following
conditions.
• The bus command is a configuration read or write transaction
• The low 2 address bits are equal to 01b
• The bus number falls in the range defined by the lower limit (exclusive) in the secondary bus
number register and the upper limit (inclusive) in the subordinate bus number register
Type 1 to type 1 forwarding is only done for cycles from the hub interface to PCI.
Type 1 to Special Cycle Forwarding
The P64H2 translates a type 1 configuration write transaction on the hub interface into a special
cycle on PCI, but does not translate a type 1 configuration access on PCI to a special cycle on the
hub interface. A cycle to be translated has the following attributes in the address:
• The low 2 address bits on PxAD[1:0]are equal to 01b
• The device number in address bits PxAD[15:11] is equal to 11111b
• The function number in address bits PxAD[10:8] is equal to 111b
• The register number in address bits PxAD[7:2] is equal to 000000b
• The bus number is equal to the value in the secondary bus number register in configuration
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• The bus command is a Configuration Write command
The address and data are forwarded unchanged. Devices ignore the address and decode only the
bus command. The data phase contains the special cycle message. The transaction will master
abort, but results in a normal completion on the opposite bus (normal completion status on the hub
interface TRDY# on PCI). If more than one data transfer is requested, the P64H2 responds with a
target disconnect operation during the first data phase.
Intel^® 82870P2 P64H2 Datasheet
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