82870P2P64H2 Datasheet, PDF (39/217 Pages) –

Register Description
R
Bits
Description
15:10
9
8
7
6
5
4
3
2
1
0
Reserved.
Fast Back-to-back Enable (FBE)—RO. Hardwired to 0. This bit has no meaning on the hub
interface.
SERR# Enable (SEE)—R/W. This bit controls the enable for DO_SERR special cycle on the hub
interface
0 = Disable special cycle.
1 = Enable special cycle.
Wait Cycle Control (WCC)—RO. Reserved. Hardwired to 0.
Parity Error Response Enable (PERE)—R/W. This bit controls the P64H2’s response when a
parity / multi-bit ECC error is detected on the hub interface.
0 = Disable. The P64H2 ignores these errors on the hub interface.
1 = Enable. The P64H2 reports these errors on the hub interface and sets the DPD bit in the
PD_STS Register.
VGA Palette Snoop Enable (VGA_PSE)—RO. Reserved. Hardwired to 0.
Memory Write and Invalidate Enable (MWIE)—RO. Hardwired to 0. The P64H2 does not
generate memory write and invalidate transactions, as the hub interface does not have a
corresponding transfer type.
Special Cycle Enable (SCE)—RO. Reserved.
Bus Master Enable (BME)—R/W. This bit controls the P64H2’s ability to act as a master on the
hub interface when forwarding memory transactions from PCI.
0 = Disable. The P64H2 does not respond to any memory transactions on the PCI interface that
target the hub interface.
1 = Enable.
Memory Space Enable (MSE)—R/W. This bit controls the P64H2’s response as a target to
memory accesses on the hub interface that address a device behind the P64H2.
0 = Disable. The P64H2 does not respond to Memory or I/O transactions on the PCI bus and
does not initiate I/O or memory transactions on the hub interface.
1 = Enable. The P64H2 is allowed to accept cycles from PCI to be passed to the hub interface
I/O Space Enable (IOSE)—R/W. This bit controls the P64H2’s response as a target to I/O
transactions on the primary interface that addresses a device that resides behind the P64H2.
0 = Disables the P64H2 from responding to I/O transactions initiated on the hub interface.
1 = Enables the P64H2 to respond to I/O transaction initiated on the hub interface
Intel^® 82870P2 P64H2 Datasheet
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