82870P2P64H2 Datasheet, PDF (64/217 Pages) –

Register Description
R
3.2.45
ACNF—Additional P64H2 Configuration Register
(D29,31: F0)
Offset:
E0–E3h
Default Value: 0000000Fh
Attribute:
Size:
R/W
32 bits
Bits
Description
31:16
15
14
13:12
11
10
9
8
7
6
5
Reserved
Write Starvation Enable (WSE). Only the value from PCI Bus A (device 31) will be used.
0 = No write starvation control logic will be activated.
1 = The Intel® P64H2 will activate logic to prevent write, read, completion, and other posted
request starvation of PCI devices.
Read Starvation Enable (RSE). Only the value from PCI Bus A (device 31) will be used.
0 = No read starvation control logic will be activated.
1 = The P64H2 will activate logic to prevent read starvation of PCI devices.
Reserved
Disable RCOMP Calibration Pattern Detection Logic (DISRCPD). The P64H2 has logic to end
the RCOMP calibration when a pattern of 1-0-1-0-1 is detected.
0 = The pattern detection is disabled and the RCOMP calibration does not end when a pattern of
1-0-1-0-1 is detected. (default)
1 = Enables the pattern detection logic to potentially end calibration early.
Reserved
Outbound First Data. Only the value from PCI bus A (Device 31) will be used.
1 = If this bit is 1 and the P64H2 is running in Hub Interface 2.0 mode, the P64H2 will enqueue
it’s read completion and write request command with the first DWord of data in a 64 byte
cache line.
Outbound Bypass. Only the value from PCI bus A (Device 31) will be used.
1 = If this bit is 1 and the P64H2 is running in Hub Interface 2.0 mode, the P64H2 will bypass it’s
outbound read and write command queues and write/read completion data queue if they are
empty.
Inbound Bypass. Only the value from PCI bus A (Device 31) will be used.
1 = P64H2 bypasses its inbound read command queue, if empty.
Peer Memory Read Enable (PMRE). Both bridges must program this bit to the same value;
however, the value from PCI A (device 31) will be used for all devices, except device 30.
0 = Normal operation. Peer memory reads are not allowed and all memory reads from the PCI
bridge will be sent to the hub interface regardless of address.
Inbound Pending Queue Bypass.
1 = P64H2 bypasses its read pending queue, if empty. This bit can only be set to 1 if in PCI
mode.
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Intel^® 82870P2 P64H2 Datasheet