S912XHY128F0VLM Datasheet, PDF (98/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
Table 2-16. Port T Routing Register Field Descriptions (continued)
Field
4
Port T data direction—
PTTRR This register controls the routing of IOC0_4.
Description
[3:2]
PTTRR
0 IOC0_4 routed to PT4
1 IOC0_4 routed to PV0
Port T data direction—
This register controls the routing of IOC0_6.
1
PTTRR
00 IOC0_6 routed to PT6
01 IOC0_6 routed to PR0
10 IOC0_6 routed to PV4
11 IOC0_6 routed to PT6(reserved)
Port T data direction—
This register controls the routing of IOC1_7.
0
PTTRR
0 IOC1_7routed to PT3
1 IOC1_7 routed to PR3
Port T data direction—
This register controls the routing of IOC1_6.
0 IOC1_6 routed to PT2
1 IOC1_6 routed to PR2
2.3.22 Port S Data Register (PTS)
Address 0x0248
7
R
PTS7
W
6
PTS6
5
PTS5
4
PTS4
3
PTS3
2
PTS2
PWM3
PWM2
PWM1
PWM0
—
—
SDA
—
—
SCL
—
—
Altern.
Function
SS
SCK
MOSI
MISO
TXCAN
RXCAN
Reset
0
0
0
0
0
0
Figure 2-20. Port S Data Register (PTS)
1 _{Read: Anytime The data source is depending on the data direction value.}
Write: Anytime
Access: User read/write¹
1
0
PTS1
PTS0
PWM7
—
TXD
0
PWM6
—
RXD
0
MC9S12XHY-Family Reference Manual, Rev. 1.01
98
Freescale Semiconductor