S912XHY128F0VLM Datasheet, PDF (126/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
2.3.61 PIM Reserved Registers
Address 0x0275
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
0
0
0
0
0
0
0
Figure 2-58. PIM Reserved Register
Access: User read/write¹
1
0
0
0
0
0
2.3.62 Port AD Pull Up Enable Register (PER0AD)
Address 0x0276
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
Access: User read/write¹
6
5
4
3
2
1
0
0
0
0
PER0AD3 PER0AD2 PER0AD1 PER0AD0
0
0
0
0
0
0
0
Figure 2-59. Port AD Pull Up Enable Register (PER0AD)
Table 2-50. PER0AD Register Field Descriptions
Field
Description
3-0 Port AD pull-up enable—Enable pull-up device on input pin
PER0AD This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
2.3.63 Port AD Pull Up Enable Register (PER1AD)
Address 0x0277
7
R
PER1AD7
W
Reset
0
Access: User read/write¹
6
5
4
3
2
1
0
PER1AD6 PER1AD5 PER1AD4 PER1AD3 PER1AD2 PER1AD1 PER1AD0
0
0
0
0
0
0
0
Figure 2-60. Port AD Pull Up Enable Register (PER1AD)
MC9S12XHY-Family Reference Manual, Rev. 1.01
126
Freescale Semiconductor