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S912XHY128F0VLM Datasheet, PDF (227/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers
S12X Debug (S12XDBGV3) Module
Address
0x0024
Name
R
DBGTBH
W
Bit 7
Bit 15
6
Bit 14
5
Bit 13
4
Bit 12
3
Bit 11
2
Bit 10
1
Bit 9
0x0025
R
DBGTBL
W
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
R
0
0x0026 DBGCNT
W
CNT
R
0
0
0
0
0x0027 DBGSCRX
SC3
SC2
SC1
W
R
0
0
0
0
MC3
MC2
MC1
0x0027 DBGMFR
W
0x00281
DBGXCTL R
(COMPA/C) W
0
NDB
TAG
BRK
RW
RWE reserved
0x00282
DBGXCTL R
(COMPB/D) W
SZE
SZ
TAG
BRK
RW
RWE reserved
R
0
0x0029 DBGXAH
Bit 22
21
20
19
18
17
W
R
0x002A DBGXAM
Bit 15
14
13
12
11
10
9
W
R
0x002B DBGXAL
Bit 7
6
5
4
3
2
1
W
R
0x002C DBGXDH
Bit 15
14
13
12
11
10
9
W
R
0x002D DBGXDL
Bit 7
6
5
4
3
2
1
W
R
0x002E DBGXDHM
Bit 15
14
13
12
11
10
9
W
R
0x002F DBGXDLM
Bit 7
6
5
4
3
2
1
W
1 This represents the contents if the Comparator A or C control register is blended into this address.
2 This represents the contents if the Comparator B or D control register is blended into this address
Figure 6-2. Quick Reference to S12XDBG Registers
Bit 0
Bit 8
Bit 0
SC0
MC0
COMPE
COMPE
Bit 16
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
6.3.2 Register Descriptions
This section consists of the S12XDBG control and trace buffer register descriptions in address order. Each
comparator has a bank of registers that are visible through an 8-byte window between 0x0028 and 0x002F
in the S12XDBG module register address map. When ARM is set in DBGC1, the only bits in the
S12XDBG module registers that can be written are ARM, TRIG, and COMRV[1:0]
MC9S12XHY-Family Reference Manual Rev. 1.01
Freescale Semiconductor
227