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S912XHY128F0VLM Datasheet, PDF (749/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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Electrical Characteristics
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in Figure A-4.
0
1
2
3
N-1
N
tmin1
tnom
tmax1
tminN
tmaxN
Figure A-4. Jitter Deï¬nitions
The relative deviation of tnom is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Deï¬ning the jitter as:
J(N)
=
â
maxâ
â
1
â
t-N-m-----â
-a--t-nx----(o--N--m---)
,
1
â
N-t--m---â
--i-t-n-n---(-o-N---m--)-
â
â
â
For N < 1000, the following equation is a good ï¬t for the maximum jitter:
J(N)
=
---j--1---
N
+
j2
J(N)
1
5
10
20
N
Figure A-5. Maximum bus clock jitter approximation
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
749
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