S912XHY128F0VLM Datasheet, PDF (78/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
Register
Name
0x0001 R
PORTB _W
Bit 7
PB7
0x0002 R
DDRA _W ^DDRA7
0x0003 R
DDRB _W ^DDRB7
0x0004 R
0
-0x0009 _W
Reserved
6
PB6
DDRA6
DDRB6
0
5
PB5
DDRA5
DDRB5
0
4
PB4
DDRA4
DDRB4
0
3
PB3
DDRA3
DDRB3
0
2
PB2
DDRA2
DDRB2
0
0x000A R
0x000B _W
Non-PIM
Address
Range
0x000C R
0
PUCR _W
0x000D R
0
Reserved _W
BKPUE
0
Non-PIM Address Range
0
0
0
0
0
0
0
0
0x000E– R
0x001B _W
Non-PIM
Address
Range
Non-PIM Address Range
0x001C R
0
ECLKCTL _W ^NECLK
DIV16
EDIV4
EDIV3
0x001D R
0
0
0
0
0
Reserved _W
0x001E R
0
0
IRQCR _W ^IRQE
IRQEN
XIRQEN
0x001F R
0
0
0
0
0
W
Reserved
= Unimplemented or Reserved
EDIV2
0
0
0
1
PB1
DDRA1
DDRB1
0
PUPBE
0
EDIV1
0
0
0
Bit 0
PB0
DDRA0
DDRB0
0
PUPAE
0
EDIV0
0
0
0
MC9S12XHY-Family Reference Manual, Rev. 1.01
78
Freescale Semiconductor