S912XHY128F0VLM Datasheet, PDF (736/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Electrical Characteristics
Table A-14. ATD Conversion Performance 5V range
Conditions are shown in Table A-4. unless otherwise noted. V_REF = V_RH - V_RL = 5.12V. f_ATDCLK = 8.0MHz
The values are tested to be valid with no PortAD output drivers switching simultaneous with conversions.
Num C
Rating^1,2
Symbol
Min
Typ
Max
Unit
1 P Resolution
10-Bit
LSB
—
5
—
mV
2 P Differential Nonlinearity
10-Bit
DNL
-1
±0.5
1
counts
3 P Integral Nonlinearity
4 P Absolute Error³
10-Bit
10-Bit
INL
-2
±1
AE
-3
±2
2
counts
3
counts
5 C Resolution
8-Bit
LSB
—
20
—
mV
6 C Differential Nonlinearity
8-Bit
DNL
-0.5
±0.3
0.5
counts
7 C Integral Nonlinearity
8-Bit
INL
-1
±0.5
1
counts
8 C Absolute Error³
8-Bit
AE
-1.5
±1
1.5
counts
1 ^{The 8-bit and 10-bit mode operation is structurally tested in production test. Absolute values are tested in 12-bit mode.}
2 ^{Better performance is possible using specially designed multi-layer PCBs or averaging techniques.}
Table A-15. ATD Conversion Performance 3.3V range
Conditions are shown in Table A-4. unless otherwise noted. V_REF = V_RH - V_RL = 3.3V. f_ATDCLK = 8.0MHz
The values are tested to be valid with no PortAD output drivers switching simultaneous with conversions.
Num C
Rating^1,2
Symbol
Min
Typ
Max
Unit
1 P Resolution
10-Bit
LSB
—
3.22
—
mV
2 P Differential Nonlinearity
10-Bit
DNL
-1.5
±1
1.5
counts
3 P Integral Nonlinearity
4 P Absolute Error³
10-Bit
10-Bit
INL
-2
±1
AE
-3
±2
2
counts
3
counts
5 C Resolution
8-Bit
LSB
—
12.89
—
mV
6 C Differential Nonlinearity
8-Bit
DNL
-0.5
±0.3
0.5
counts
7 C Integral Nonlinearity
8-Bit
INL
-1
±0.5
1
counts
8 C Absolute Error³
8-Bit
AE
-1.5
±1
1.5
counts
1 ^{The 8-bit and 10-bit mode operation is structurally tested in production test. Absolute values are tested in 12-bit mode.}
2 ^{Better performance is possible using specially designed multi-layer PCBs or averaging techniques.}
A.3 NVM, Flash
A.3.1 Timing Parameters
The time base for all NVM program or erase operations is derived from the oscillator. A minimum
oscillator frequency f_NVMOSC is required for performing program or erase operations. The NVM modules
do not have any means to monitor the frequency and will not prevent program or erase operation at
frequencies above or below the specified minimum. When attempting to program or erase the NVM
modules at a lower frequency, a full program or erase transition is not assured.
The program and erase operations are timed using a clock derived from the oscillator using the FCLKDIV
register. The frequency of this clock must be set within the limits specified as f_NVMOP.
MC9S12XHY-Family Reference Manual, Rev. 1.01
736
Freescale Semiconductor