S912XHY128F0VLM Datasheet, PDF (165/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Memory Mapping Control (S12XMMCV4)
3.3.2.4 MMC Control Register (MMCCTL1)
Address: 0x0013 PRR
7
6
5
4
3
2
1
0
R
0
0
0
0
0
MGRAMON
DFIFRON PGMIFRON
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-10. MMC Control Register (MMCCTL1)
Read: Anytime. .
Write: Refer to each bit description.
Table 3-6. MMCCTL1 Field Descriptions
Field
Description
7
MGRAMON
Flash Memory Controller SCRATCH RAM visible in the global memory map
Write: Anytime
This bit is used to made the Flash Memory Controller SCRATCH RAM visible in the global memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
5
DFIFRON
Data Flash Information Row (IFR) visible in the global memory map
Write: Anytime
This bit is used to made the IFR sector of the Data Flash visible in the global memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
4
PGMIFRON
Program Flash Information Row (IFR) visible in the global memory map
Write: Anytime
This bit is used to map the IFR sector of the Program Flash to address range 0x40_000-0x40_3FFF of the global
memory map.
0 Not visible in the global memory map.
1 Visible in the global memory map.
3.3.2.5 Program Page Index Register (PPAGE)
Address: 0x0015
R
W
Reset
7
PIX7
1
Read: Anytime
6
PIX6
5
PIX5
4
PIX4
3
PIX3
2
PIX2
1
1
1
1
1
Figure 3-11. Program Page Index Register (PPAGE)
1
PIX1
1
0
PIX0
0
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
165