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S912XHY128F0VLM Datasheet, PDF (185/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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Interrupt (S12XINTV2)
4.3 Memory Map and Register Deï¬nition
This section provides a detailed description of all registers accessible in the XINT module.
4.3.1 Module Memory Map
Table 4-3 gives an overview over all XINT module registers.
Table 4-3. XINT Memory Map
Address
0x0120
0x0121
0x0122â0x0125
0x0126
0x0127
0x0128
0x0129
0x012A
0x012B
0x012C
0x012D
0x012E
0x012F
Use
RESERVED
Interrupt Vector Base Register (IVBR)
RESERVED
XGATE Interrupt Priority Conï¬guration Register
(INT_XGPRIO)
Interrupt Request Conï¬guration Address Register
(INT_CFADDR)
Interrupt Request Conï¬guration Data Register 0
(INT_CFDATA0)
Interrupt Request Conï¬guration Data Register 1
(INT_CFDATA1)
Interrupt Request Conï¬guration Data Register 2
(INT_CFDATA2
Interrupt Request Conï¬guration Data Register 3
(INT_CFDATA3)
Interrupt Request Conï¬guration Data Register 4
(INT_CFDATA4)
Interrupt Request Conï¬guration Data Register 5
(INT_CFDATA5)
Interrupt Request Conï¬guration Data Register 6
(INT_CFDATA6)
Interrupt Request Conï¬guration Data Register 7
(INT_CFDATA7)
Access
â
R/W
â
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
185
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