S912XHY128F0VLM Datasheet, PDF (123/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

2.3.56 Port AD Data Register (PT0AD)
Port Integration Module (S12XHYPIMV1)
Address 0x0270
7
6
5
4
3
2
R
0
0
0
0
PT0AD3
PT0AD2
W
Altern.
Function
--
--
--
--
AN11
AN10
Reset
0
0
0
0
0
0
Figure 2-53. Port AD Data Register (PT0AD)
1 _{Read: Anytime. The data source is depending on the data direction value.}
Write: Anytime
Access: User read/write¹
1
0
PT0AD1
PT0AD0
AN9
AN8
0
0
Table 2-46. PT0AD Register Field Descriptions
Field
Description
3-0
PT0AD
Port AD general purpose input/output data—Data Register, ATD AN analog input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
2.3.57 Port AD Data Register (PT1AD)
Address 0x0271
7
R
PT1AD7
W
6
PT1AD6
5
PT1AD5
4
PT1AD4
3
PT1AD3
2
PT1AD2
KWAD7
KWAD6
KWAD5
KWAD4
KWAD3
KWAD2
Altern.
Function
AN7
AN6
AN5
AN4
AN3
AN2
Reset
0
0
0
0
0
0
Figure 2-54. Port AD Data Register (PT1AD)
1 _{Read: Anytime. The data source is depending on the data direction value.}
Write: Anytime
Access: User read/write¹
1
0
PT1AD1
PT1AD0
KWAD1
KWAD0
AN1
AN0
0
0
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
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