English
Language : 

S912XHY128F0VLM Datasheet, PDF (70/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers
Port Integration Module (S12XHYPIMV1)
Port Pin Name
R
PR[7]
PR[6]
PR[5]
PR[4]
PR[3:2]
PR[1]
PR[0]
Pin Function
& Priority1
FP[27]
GPIO
FP[18]
SCL
GPIO
FP[17]
SDA
GPIO
FP[12]
KWR4
GPIO
KWR[3:2]
IOC1[7:6]
GPIO
KWR[1]
TXCAN1
IOC0[7]
GPIO
KWR[0]
RXCAN1
IOC0[6]
GPIO
I/O
Description
I LCD frontplane segment driver output
I/O General purpose
I LCD frontplane segment driver output
I/O SCL of IIC, mappable through software
I/O General purpose
I LCD frontplane segment driver output
I/O SDA of IIC, mappable through software
I/O General purpose
I LCD frontplane segment driver output
I Key Wakeup
I/O General purpose
I Key Wakeup
I/O TIM1 channel, mappable through software
I/O General purpose
I Key Wakeup
O TX of CAN1
I/O TIM0 channel, mappable through software
I/O General purpose
I Key Wakeup
I RX of CAN1
I/O TIM0 channel, mappable through software
I/O General purpose
Pin Function
after Reset
GPIO
MC9S12XHY-Family Reference Manual, Rev. 1.01
70
Freescale Semiconductor