S912XHY128F0VLM Datasheet, PDF (702/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Stepper Stall Detector (SSDV1) Block Description
21.3 Memory Map and Register Definition
This section provides a detailed description of all registers of the stepper stall detector (SSD) block.
21.3.1 Module Memory Map
Table 21-2 gives an overview of all registers in the SSDV1 memory map. The SSDV1 occupies eight bytes
in the memory space. The register address results from the addition of base address and address offset. The
base address is determined at the MCU level and is given in the Device Overview chapter. The address
offset is defined at the block level and is given here.
Table 21-2. SSDV1 Memory Map
Address
Offset
Use
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
RTZCTL
MDCCTL
SSDCTL
SSDFLG
MDCCNT (High)
MDCCNT (Low)
ITGACC (High)
ITGACC (Low)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R
R
21.3.2 Register Descriptions
This section describes in detail all the registers and register bits in the SSDV1 block. Each description
includes a standard register diagram with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order.
MC9S12XHY-Family Reference Manual, Rev. 1.01
702
Freescale Semiconductor