S912XHY128F0VLM Datasheet, PDF (109/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
2.3.34 PIM Reserved Registers
Address 0x0253
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-31. PIM Reserved Register
Access: User read/write¹
1
0
0
0
0
0
2.3.35 Port M Pull Device Enable Register (PERM)
Address 0x0254
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
Access: User read/write¹
6
5
4
3
2
1
0
0
0
0
PERM3
PERM2
PERM1
PERM0
0
0
0
1
1
1
1
= Unimplemented or Reserved
Figure 2-32. Port M Pull Device Enable Register (PERM)
Table 2-28. PERT Register Field Descriptions
Field
3-0
PERM
Description
Port M pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
109