S912XHY128F0VLM Datasheet, PDF (540/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Timer Module (TIM16B8CV2) Block Description
16.3.2.18 Output Compare Pin Disconnect Register(OCPD)
Module Base + 0x002C
7
R
OCPD7
W
6
OCPD6
5
OCPD5
4
OCPD4
3
OCPD3
2
OCPD2
1
OCPD1
Reset
0
0
0
0
0
0
0
Figure 16-28. Ouput Compare Pin Disconnect Register (OCPD)
Read: Anytime
Write: Anytime
All bits reset to zero.
0
OCPD0
0
Table 16-22. OCPD Field Description
Field
Description
OCPD[7:0}
Output Compare Pin Disconnect Bits
0 Enables the timer channel port. Ouptut Compare action will occur on the channel pin. These bits do not affect
the input capture or pulse accumulator functions
1 Disables the timer channel port. Output Compare action will not occur on the channel pin, but the output
compare flag still become set .
16.3.2.19 Precision Timer Prescaler Select Register (PTPSR)
Module Base + 0x002E
7
R
PTPS7
W
6
PTPS6
5
PTPS5
4
PTPS4
3
PTPS3
2
PTPS2
1
PTPS1
Reset
0
0
0
0
0
0
0
Figure 16-29. Precision Timer Prescaler Select Register (PTPSR)
Read: Anytime
Write: Anytime
All bits reset to zero.
0
PTPS0
0
MC9S12XHY-Family Reference Manual, Rev. 1.01
540
Freescale Semiconductor