S912XHY128F0VLM Datasheet, PDF (148/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
2.3.92 PIM Reserved Registers
Address 0x029B
7
6
5
4
3
2
R
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
u = Unaffected by reset
1 _{Read: Always reads 0x00}
Write: Unimplemented
Figure 2-89. PIM Reserved Registers
Access: User read¹
1
0
0
0
0
0
2.3.93 Port V Pull Device Enable Register (PERV)
Address 0x029C
R
W
Reset
7
PERV7
0
1 _{Read: Anytime.}
Write: Anytime.
6
PERV6
5
PERV5
4
PERV4
3
PERV3
2
PERV2
0
0
0
0
0
Figure 2-90. Port V Pull Device Enable Register (PERV)
Access: User read/write¹
1
0
PERV1
PERV0
0
0
Table 2-76. PERV Register Field Descriptions
Field
7-0
PERV
Description
Port V pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
2.3.94 Port V Polarity Select Register (PPSV)
Address 0x029D
R
W
Reset
7
PPSV7
0
6
PPSV6
5
PPSV5
4
PPSV4
3
PPSV3
2
PPSV2
0
0
0
0
0
Figure 2-91. Port V Polarity Select Register (PPSV)
Access: User read/write¹
1
0
PPSV1
PPSV0
0
0
MC9S12XHY-Family Reference Manual, Rev. 1.01
148
Freescale Semiconductor