S912XHY128F0VLM Datasheet, PDF (257/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12X Debug (S12XDBGV3) Module
BRK
0
0
0
0
0
0
1
1
x
TALIGN
00
00
01
01
10
10
00,01,10
00,01,10
11
Table 6-43. Breakpoint Setup
DBGBRK
0
1
0
1
0
1
1
0
x
Breakpoint Alignment
Fill Trace Buffer until trigger
(no breakpoints — keep running)
Fill Trace Buffer until trigger, then breakpoint request occurs
Start Trace Buffer at trigger
(no breakpoints — keep running)
Start Trace Buffer at trigger
A breakpoint request occurs when Trace Buffer is full
Store a further 32 Trace Buffer line entries after trigger
(no breakpoints — keep running)
Store a further 32 Trace Buffer line entries after trigger
Request breakpoint after the 32 further Trace Buffer entries
Terminate tracing and generate breakpoint immediately on trigger
Terminate tracing immediately on trigger
Reserved
6.4.7.2 Breakpoints Generated Via The TRIG Bit
If a TRIG triggers occur, the Final State is entered. If a tracing session is selected by TSOURCE,
breakpoints are requested when the tracing session has completed, thus if Begin or Mid aligned triggering
is selected, the breakpoint is requested only on completion of the subsequent trace (see Table 6-43). If no
tracing session is selected, breakpoints are requested immediately. TRIG breakpoints are possible even if
the S12XDBG module is disarmed.
6.4.7.3 S12XDBG Breakpoint Priorities
If a TRIG trigger occurs after Begin or Mid aligned tracing has already been triggered by a comparator
instigated transition to Final State, then TRIG no longer has an effect. When the associated tracing session
is complete, the breakpoint occurs. Similarly if a TRIG is followed by a subsequent trigger from a
comparator channel, it has no effect, since tracing has already started.
6.4.7.3.1 S12XDBG Breakpoint Priorities And BDM Interfacing
Breakpoint operation is dependent on the state of the S12XBDM module. If the S12XBDM module is
active, the CPU12X is executing out of BDM firmware and S12X breakpoints are disabled. In addition,
while executing a BDM TRACE command, tagging into BDM is disabled. If BDM is not active, the
breakpoint will give priority to BDM requests over SWI requests if the breakpoint coincides with a SWI
instruction in the user’s code. On returning from BDM, the SWI from user code gets executed.
Table 6-44. Breakpoint Mapping Summary
DBGBRK
(DBGC1[3])
0
1
1
BDM Bit
(DBGC1[4])
X
0
0
BDM
Enabled
X
X
X
BDM
Active
X
0
1
S12X Breakpoint
Mapping
No Breakpoint
Breakpoint to SWI
No Breakpoint
MC9S12XHY-Family Reference Manual Rev. 1.01
Freescale Semiconductor
257