S912XHY128F0VLM Datasheet, PDF (626/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

128 KByte Flash Module (S12XFTMR128K1V1)
Address
& Name
0x000E
FECCRHI
7
R ECCR15
W
6
ECCR14
5
ECCR13
4
ECCR12
3
ECCR11
2
ECCR10
0x000F
R ECCR7
FECCRLO _W
ECCR6
ECCR5
ECCR4
ECCR3
ECCR2
0x0010
R NV7
NV6
NV5
NV4
NV3
NV2
FOPT
W
0x0011
R
0
0
0
0
0
0
FRSV2 _W
0x0012
R
0
0
0
0
0
0
FRSV3 _W
0x0013
R
0
0
0
0
0
0
FRSV4 _W
= Unimplemented or Reserved
1
ECCR9
ECCR1
NV1
0
0
0
0
ECCR8
ECCR0
NV0
0
0
0
Figure 19-1. FTMR128K1 Register Summary (continued)
19.2.1.1 Flash Clock Divider Register (FCLKDIV)
The FCLKDIV register is used to control timed events in program and erase algorithms.
Offset Module Base + 0x0000
7
6
5
4
3
2
1
0
R FDIVLD
W
FDIV[6:0]
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 19-2. Flash Clock Divider Register (FCLKDIV)
All bits in the FCLKDIV register are readable, bits 6–0 are write once and bit 7 is not writable.
MC9S12XHY-Family Reference Manual, Rev. 1.01
626
Freescale Semiconductor