S912XHY128F0VLM Datasheet, PDF (114/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
1 _{Read: Anytime.}
Write: Anytime.
Table 2-34. PERP Register Field Descriptions
Field
7-0
PERP
Description
Port P pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset all pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
2.3.44 Port P Polarity Select Register (PPSP)
Address 0x025D
R
W
Reset
7
PPSP7
1
1 _{Read: Anytime.}
Write: Anytime.
6
PPSP6
5
PPSP5
4
PPSP4
3
PPSP3
2
PPSP2
1
1
1
1
1
Figure 2-41. Port P Polarity Select Register (PPSP)
Access: User read/write¹
1
0
PPSP1
PPSP0
1
1
Table 2-35. PPSP Register Field Descriptions
Field
7-0
PPSP
Description
Port P pull device select—Determine pull device polarity on input pins
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-up
or pull-down device if enabled.
1 A pull-down device is connected to the associated Port P pin, if enabled by the associated bit in register PERP and
if the port is used as input.
0 A pull-up device is connected to the associated Port P pin, if enabled by the associated bit in register PERP and
if the port is used as input.
2.3.45 Port P Routing Register High (PTPRRH)
Read: Anytime.
Address 0x025E
7
R
PTPRRH7
W
Reset
0
1 _{Read: Anytime.}
Write: Anytime.
6
5
4
3
2
PTPRRH6 PTPRRH5 PTPRRH4 PTPRRH3 PTPRRH2
0
0
0
0
0
Figure 2-42. Port P Routing Register High (PTPRRH)
Access: User read/write¹
1
0
PTPRRH1 PTPRRH0
0
0
MC9S12XHY-Family Reference Manual, Rev. 1.01
114
Freescale Semiconductor