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S912XHY128F0VLM Datasheet, PDF (258/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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S12X Debug (S12XDBGV3) Module
Table 6-44. Breakpoint Mapping Summary
1
1
0
X
Breakpoint to SWI
1
1
1
0
Breakpoint to BDM
1
1
1
1
No Breakpoint
BDM cannot be entered from a breakpoint unless the ENABLE bit is set in the BDM. If entry to BDM via
a BGND instruction is attempted and the ENABLE bit in the BDM is cleared, the CPU12X actually
executes the BDM ï¬rmware code. It checks the ENABLE and returns if ENABLE is not set. If not serviced
by the monitor then the breakpoint is re-asserted when the BDM returns to normal CPU12X ï¬ow.
If the comparator register contents coincide with the SWI/BDM vector address then an SWI in user code
and DBG breakpoint could occur simultaneously. The CPU12X ensures that BDM requests have a higher
priority than SWI requests. Returning from the BDM/SWI service routine care must be taken to avoid re
triggering a breakpoint.
NOTE
When program control returns from a tagged breakpoint using an RTI or
BDM GO command without program counter modiï¬cation it will return to
the instruction whose tag generated the breakpoint. To avoid re triggering a
breakpoint at the same location reconï¬gure the S12XDBG module in the
SWI routine, if conï¬gured for an SWI breakpoint, or over the BDM
interface by executing a TRACE command before the GO to increment the
program ï¬ow past the tagged instruction.
MC9S12XHY-Family Reference Manual, Rev. 1.01
258
Freescale Semiconductor
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