S912XHY128F0VLM Datasheet, PDF (92/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
1 _{Read: Always reads 0x00}
Write: Unimplemented
2.3.12 IRQ Control Register (IRQCR)
Address 0x001E
7
6
5
4
3
2
R
0
0
0
IRQE
IRQEN
XIRQEN
W
Reset
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-10. IRQ Control Register (IRQCR)
1 _{Read: See individual bit descriptions below.}
Write: See individual bit descriptions below.
Access: User read/write¹
1
0
0
0
0
0
Table 2-10. IRQCR Register Field Descriptions
Field
7
IRQE
IRQ select edge sensitive only—
Special mode: Read or write anytime.
Normal mode: Read anytime, write once.
Description
6
IRQEN
1 IRQ pin configured to respond only to falling edges. Falling edges on the IRQ pin will be detected anytime IRQE=1
and will be cleared only upon a reset or the servicing of the IRQ interrupt.
0 IRQ pin configured for low level recognition
IRQ enable—
Read or write anytime.
1 IRQ pin is connected to interrupt logic
0 IRQ pin is disconnected from interrupt logic
5
XIRQ enable—
XIRQEN Special mode: Read or write anytime.
Normal mode: Read anytime, write once.
1 XIRQ pin is connected to interrupt logic
0 XIRQ pin is disconnected from interrupt logic
2.3.13 PIM Reserved Register
This register is reserved for factory testing of the PIM module and is not available in normal operation.
MC9S12XHY-Family Reference Manual, Rev. 1.01
92
Freescale Semiconductor