S912XHY128F0VLM Datasheet, PDF (775/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Detailed Register Address Map
0x0070–0x09F Analog to Digital Converter (ATD)
Address Name
Bit 7
0x0070
0x0071
0x0072
0x0073
0x0074
0x0075
0x0076
0x0077
0x0078
ATDCTL0
ATDCTL1
ATDCTL2
ATDCTL3
ATDCTL4
ATDCTL5
ATDSTAT0
Unimple-
mented
ATDCMPEH
R
Reserved
W
R
ETRIGSEL
W
R
0
W
R
DJM
W
R
SMP2
W
R
0
W
R
SCF
W
R
0
W
R
0
W
R
0x0079 ATDCMPEL
W
R
0
0x007A ATDSTAT2H
W
R
0x007B ATDSTAT2L
W
R
0
0x007C ATDDIENH _W
R
0x007D ATDDIENL
W
R
0
0x007E ATDCMPHTH
W
0x007F
0x0080
0x0082
0x084
0x0086
0x0088
0x008A
R
ATDCMPHTL
W
R
ATDDR0
W
R
ATDDR1
W
R
ATDDR2
W
R
ATDDR3
W
R
ATDDR4
W
R
ATDDR5
W
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
WRAP3
Bit 2
WRAP2
Bit 1
WRAP1
Bit 0
WRAP0
SRES1
SRES0
SMP_DIS
ETRIGCH
3
ETRIGCH
2
ETRIGCH
1
ETRIGCH
0
AFFC ICLKSTP ETRIGLE ETRIGP ETRIGE ASCIE ACMPIE
S8C
S4C
S2C
S1C
FIFO
FRZ1
FRZ0
SMP1
SMP0
PRS[4:0]
SC
SCAN
MULT
CD
0
CC3
ETORF FIFOR
0
0
0
0
CC
CC2
0
CB
CC1
0
CA
CC0
0
0
0
0
CMPE[11:8]
CMPE[7:0]
0
0
0
CCF[11:8]
CCF[7:0]
0
0
0
IEN[11:8]
IEN[7:0]
0
0
0
CMPHT[11:8]
CMPHT[7:0]
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 10.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 10.3.2.12.2, “Right Justified Result Data (DJM=1)”
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
775