S912XHY128F0VLM Datasheet, PDF (80/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
Register
Name
0x024D R
PPSS _W
Bit 7
PPSS7
0x024E R
WOMS _W ^WOMS7
0x024F R
0
PTSRR _W
6
PPSS6
WOMS6
0
5
PPSS5
4
PPSS4
WOMS5 WOMS4
PTSRR5 PTSRR4
3
PPSS3
WOMS3
0
2
PPSS2
WOMS2
0
1
PPSS1
Bit 0
PPSS0
WOMS1 WOMS0
PTSRR1 PTSRR0
0x0250 R
0
0
0
0
PTM _W
PTM3
PTM2
PTM1
PTM0
0x0251 R
0
0
0
0
PTIM3
PTIM2
PTIM1
PTIM0
PTIM _W
0x0252 R
0
0
0
0
DDRM _W
DDRM3
DDRM2
DDRM1
DDRM0
0x0253 R
0
0
0
0
0
0
0
0
Reserved _W
0x0254 R
0
0
0
0
PERM _W
PERM3
PERM2
PERM1
PERM0
0x0255 R
0
0
0
0
PPSM _W
PPSM3
PPSM2
PPSM1
PPSM0
0x0256 R
0
0
0
0
0
0
WOMM _W
WOMM1 WOMM0
0x0257 R
0
0
0
0
0
0
0
0
Reserved _W
0x0258 R
PTP _W
PTP7
0x0259 R
PTIP _W
PTIP7
0x025A R
DDRP _W ^DDRP7
0x025B R
0
Reserved _W
PTP6
PTIP6
DDRP6
0
PTP5
PTIP5
DDRP5
0
PTP4
PTIP4
DDRP4
0
PTP3
PTIP3
DDRP3
0
PTP2
PTIP2
DDRP2
0
PTP1
PTIP1
DDRP1
0
PTP0
PTIP0
DDRP0
0
= Unimplemented or Reserved
MC9S12XHY-Family Reference Manual, Rev. 1.01
80
Freescale Semiconductor