S912XHY128F0VLM Datasheet, PDF (307/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Voltage Regulator (S12VREGL3V3V1)
9.3.2.5 Autonomous Periodical Interrupt Rate High and Low Register
(VREGAPIRH / VREGAPIRL)
The VREGAPIRH and VREGAPIRL register allows the configuration of the VREG_3V3 autonomous
periodical interrupt rate.
0x02F4
R
W
Reset
7
APIR15
6
APIR14
5
APIR13
4
APIR12
3
APIR11
2
APIR10
1
APIR9
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 9-5. Autonomous Periodical Interrupt Rate High Register (VREGAPIRH)
0
APIR8
0
0x02F5
R
W
Reset
7
APIR7
6
APIR6
5
APIR5
4
APIR4
3
APIR3
2
APIR2
1
APIR1
0
0
0
0
0
0
0
Figure 9-6. Autonomous Periodical Interrupt Rate Low Register (VREGAPIRL)
0
APIR0
0
Table 9-9. VREGAPIRH / VREGAPIRL Field Descriptions
Field
Description
15-0
Autonomous Periodical Interrupt Rate Bits — These bits define the timeout period of the API. See Table 9-10
APIR[15:0] for details of the effect of the autonomous periodical interrupt rate bits. Writable only if APIFE = 0 of VREGAPICL
register.
MC9S12XHY-Family Reference Manual Rev. 1.01
Freescale Semiconductor
307