S912XHY128F0VLM Datasheet, PDF (61/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Device Overview MC9S12XHY-Family
1.16 Oscillator Configuration
The XCLKS is an input signal which controls whether a crystal in combination with the internal loop
controlled (low power) Pierce oscillator is used or whether full swing Pierce oscillator/external clock
circuitry is used.
The XCLKS signal selects the oscillator configuration during reset low phase while a clock quality check
is ongoing. This is the case for:
• Power on reset or low-voltage reset
• Clock monitor reset
• Any reset while in self-clock mode or full stop mode
The selected oscillator configuration is frozen with the rising edge of the RESET pin in any of these above
described reset cases.
NOTE
Unlike XS family, XCLKS signal is applied in MC9S12XHY family instead
of XCLKS in XS family
EXTAL
MCU
C₁
Crystal or
Ceramic Resonator
XTAL
C₂
V_SSPLL
Figure 1-6. Loop Controlled Pierce Oscillator Connections (XCLKS = 0)
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
61