S912XHY128F0VLM Datasheet, PDF (106/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12XHYPIMV1)
2.3.31 Port M Data Register (PTM)
Address 0x0250
7
R
0
W
--
--
Altern.
Function
--
Reset
u
1 _{Read: Anytime.}
Write: Anytime.
6
5
4
0
0
0
--
--
--
--
--
--
--
--
--
u
u
u
= Unimplemented or Reserved
3
PTM3
2
PTM2
PWM7
IOC1_3
PWM6
IOC1_2
--
--
0
0
u = Unaffected by reset
Access: User read/write¹
1
0
PTM1
PTM0
PWM5
IOC0_3
TXD1
0
PWM4
IOC0_2
RXD1
0
Table 2-24. Port M Data Register (PTM)
Field
3
PTM
2
PTM
Table 2-25. PTM Register Field Descriptions
Description
Port M general purpose input/output data—Data Register, PWM channel7,TIM1 output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
•
• The TIM1 output function takes precedence over the PWM7 and general purpose I/O function if the related
channel is enabled.¹
• The PWM7 takes precedence over the general purpose I/O function if enabled
Port M general purpose input/output data—Data Register,PWM channel6,TIM1 output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
•
• The TIM1 output function takes precedence over the PWM6 and general purpose I/O function if the related
channel is enabled.²
• The PWM6 takes precedence over the general purpose I/O function if enabled
MC9S12XHY-Family Reference Manual, Rev. 1.01
106
Freescale Semiconductor