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S912XHY128F0VLM Datasheet, PDF (740/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers
Electrical Characteristics
t= 350 ⋅ f--N-----V-----M-1----B----U-----S-
A.3.1.14 Erase Verify D-Flash Section (FCMD=0x10)
Erase Verify D-Flash for a given number of words NW is given by .
tcheck ≈ (840 + NW) ⋅ f--N-----V-----M-1----B----U-----S-
A.3.1.15 D-Flash Programming (FCMD=0x11)
D-Flash programming time is dependent on the number of words being programmed and their location
with respect to a row boundary, because programming across a row boundary requires extra steps. The D-
Flash programming time is specified for different cases (1,2,3,4 words and 4 words across a row boundary)
at a 40MHz bus frequency. The typical programming time can be calculated using the following equation,
whereby Nw denotes the number of words; BC=0 if no boundary is crossed and BC=1 if a boundary is
crossed.
tdpgm = ⎝⎛(15 + (54 ⋅ Nw) + (16 ⋅ BC)) ⋅ -f--N---V---1-M----O---P-⎠⎞ + ⎝⎛(460 + (640 ⋅ NW) + (500 ⋅ BC)) ⋅ f---N---V----M1----B---U---S⎠⎞
The maximum programming time can be calculated using the following equation
tdpgm
=
⎛
⎝
(
15
+
( 56
⋅
Nw
)
+
( 16
⋅
BC))
⋅
f---N---V---1-M----O---P-⎠⎞
+ ⎝⎛(460 + (840 ⋅ NW) + (500 ⋅ BC)) ⋅ f---N---V----M1----B---U---S⎠⎞
A.3.1.16 Erase D-Flash Sector (FCMD=0x12)
Typical D-Flash sector erase times are those expected on a new device, where no margin verify fails occur.
They can be calculated using the following equation.
teradf ≈ 5025 ⋅ f--N-----V----M-1-----O-----P-- + 700 ⋅ f--N-----V-----M-1----B----U-----S-
Maximum D-Fash sector erase times can be calculated using the following equation.
teradf ≈ 20100 ⋅ f--N-----V----M-1-----O-----P-- + 3300 ⋅ f--N-----V-----M-1----B----U-----S-
The D-Flash sector erase time on a new device is ~5ms and can extend to 20ms as the flash is cycled.
MC9S12XHY-Family Reference Manual, Rev. 1.01
740
Freescale Semiconductor