S912XHY128F0VLM Datasheet, PDF (256/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12X Debug (S12XDBGV3) Module
6.4.6 Tagging
A tag follows program information as it advances through the instruction queue. When a tagged instruction
reaches the head of the queue a tag hit occurs and triggers the state sequencer.
Each comparator control register features a TAG bit, which controls whether the comparator match will
cause a trigger immediately or tag the opcode at the matched address. If a comparator is enabled for tagged
comparisons, the address stored in the comparator match address registers must be an opcode address for
the trigger to occur.
Using Begin trigger together with tagging, if the tagged instruction is about to be executed then the
transition to the next state sequencer state occurs. If the transition is to the Final State, tracing is started.
Only upon completion of the tracing session can a breakpoint be generated. Similarly using Mid trigger
with tagging, if the tagged instruction is about to be executed then the trace is continued for another 32
lines. Upon tracing completion the breakpoint is generated. Using End trigger, when the tagged instruction
is about to be executed and the next transition is to Final State then a breakpoint is generated immediately,
before the tagged instruction is carried out.
Read/Write (R/W), access size (SZ) monitoring and data bus monitoring is not useful if tagged triggering
is selected, since the tag is attached to the opcode at the matched address and is not dependent on the data
bus nor on the type of access. Thus these bits are ignored if tagged triggering is selected.
When configured for range comparisons and tagging, the ranges are accurate only to word boundaries.
S12X tagging is disabled when the BDM becomes active.
6.4.7 Breakpoints
Breakpoints can be generated as follows.
• From comparator channel triggers to final state.
• Using software to write to the TRIG bit in the DBGC1 register.
Breakpoints generated via the BDM BACKGROUND command have no affect on the CPU12X in STOP
or WAIT mode.
6.4.7.1 Breakpoints From Internal Comparator Channel Final State Triggers
Breakpoints can be generated when internal comparator channels trigger the state sequencer to the Final
State. If configured for tagging, then the breakpoint is generated when the tagged opcode reaches the
execution stage of the instruction queue.
If a tracing session is selected by TSOURCE, breakpoints are requested when the tracing session has
completed, thus if Begin or Mid aligned triggering is selected, the breakpoint is requested only on
completion of the subsequent trace (see Table 6-43). If no tracing session is selected, breakpoints are
requested immediately.
If the BRK bit is set on the triggering channel, then the breakpoint is generated immediately independent
of tracing trigger alignment.
MC9S12XHY-Family Reference Manual, Rev. 1.01
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