S912XHY128F0VLM Datasheet, PDF (167/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Memory Mapping Control (S12XMMCV4)
Read: Anytime
Write: Anytime
These eight index bits are used to page 4KB blocks into the RAM page window located in the local (CPU
or BDM) memory map from address 0x1000 to address 0x1FFF (see Figure 3-14). This supports accessing
up to 1022KB of RAM (in the Global map) within the 64KB Local map. The RAM page index register is
effectively used to construct paged RAM addresses in the Local map format.
Global Address [22:0]
0 0 0 ^{Bit19 Bit18}
Bit12 Bit11
Bit0
RPAGE Register [7:0]
Address [11:0]
Field
7–0
RP[7:0]
Address: CPU Local Address
or BDM Local Address
Figure 3-14. RPAGE Address Mapping
NOTE
Because RAM page 0 has the same global address as the register space, it is
possible to write to registers through the RAM space when RPAGE = 0x00.
Table 3-8. RPAGE Field Descriptions
Description
RAM Page Index Bits 7–0 — These page index bits are used to select which of the 256 RAM array pages is to
be accessed in the RAM Page Window.
The reset value of 0xFD ensures that there is a linear RAM space available between addresses 0x1000 and
0x3FFF out of reset.
The fixed 4K page from 0x2000–0x2FFF of RAM is equivalent to page 254 (page number 0xFE).
The fixed 4K page from 0x3000–0x3FFF of RAM is equivalent to page 255 (page number 0xFF).
NOTE
The page 0xFD (reset value) contains unimplemented area in the range not
occupied by RAM if RAMSIZE is less than 12KB (Refer to Section 3.4.2.3,
“Implemented Memory Map).
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
167