S912XHY128F0VLM Datasheet, PDF (398/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Inter-Integrated Circuit (IICV3) Block Description
12.2 External Signal Description
The IICV3 module has two external pins.
12.2.1 IIC_SCL — Serial Clock Line Pin
This is the bidirectional serial clock line (SCL) of the module, compatible to the IIC bus specification.
12.2.2 IIC_SDA — Serial Data Line Pin
This is the bidirectional serial data line (SDA) of the module, compatible to the IIC bus specification.
12.3 Memory Map and Register Definition
This section provides a detailed description of all memory and registers for the IIC module.
12.3.1 Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Register
Name
0x0000
IBAD
0x0001
IBFD
0x0002
IBCR
Bit 7
R
ADR7
W
R
IBC7
W
R
IBEN
W
6
ADR6
IBC6
IBIE
5
ADR5
IBC5
MS/SL
4
ADR4
IBC4
Tx/Rx
3
ADR3
IBC3
TXAK
2
ADR2
IBC2
0
RSTA
1
ADR1
Bit 0
0
IBC1
IBC0
0
IBSWAI
0x0003
R TCF
IAAS
IBB
0
SRW
RXAK
IBSR
W
IBAL
IBIF
0x0004
IBDR
0x0005
IBCR2
R
D7
W
R
GCEN
W
D6
D5
D4
0
0
ADTYPE
= Unimplemented or Reserved
D3
D2
D1
D0
0
ADR10 ADR9
ADR8
Figure 12-2. IIC Register Summary
MC9S12XHY-Family Reference Manual, Rev. 1.01
398
Freescale Semiconductor