S912XHY128F0VLM Datasheet, PDF(56/802 Page) Freescale Semiconductor, Inc – S12 Microcontrollers

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S912XHY128F0VLM Datasheet, PDF (56/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

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Device Overview MC9S12XHY-Family

1.11.2 Vectors

Table 1-11 lists all interrupt sources and vectors in the default order of priority. The interrupt module (see

Section Chapter 4 Interrupt (S12XINTV2)) provides an interrupt vector base register (IVBR) to

relocate the vectors.

Table 1-11. Interrupt Vector Locations (Sheet 1 of 3)

Vector Address(1)

Vector base + $F8

Vector base+ $F6

Vector base+ $F4

Vector base+ $F2

Vector base+ $F0

Vector base+ $EE

Vector base + $EC

Vector base+ $EA

Vector base+ $E8

Vector base+ $E6

Vector base + $E4

Vector base+ $E2

Vector base+ $E0

Vector base+ $DE

Vector base+ $DC

Vector base + $DA

Vector base + $D8

Vector base+ $D6

Vector base + $D4

Vector base + $D2

Vector base + $D0

Vector base + $CE

Vector base + $CC

Vector base + $CA

Vector base + $C8

Vector base + $C6

Vector base + $C4

Vector base + $C2

Interrupt Source

Unimplemented instruction trap

SWI

XIRQ

IRQ

Real time interrupt

TIM0 timer channel 0

TIM0 timer channel 1

TIM0 timer channel 2

TIM0 timer channel 3

TIM0 timer channel 4

TIM0 timer channel 5

TIM0 timer channel 6

TIM0 timer channel 7

TIM0 timer overï¬ow

TIM0 Pulse accumulator A overï¬ow

TIM0 Pulse accumulator input edge

SPI

SCI0

CCR

Mask

None

None

X Bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

I bit

SCI1

I bit

ATD

Port AD

Port R

Port S

Reserved

CRG PLL lock

CRG self-clock mode

I bit

Reserved

I bit

I bit

I bit

I bit

I bit

I bit

Reserved

Local Enable

None

None

IRQCR (XIRQEN)

IRQCR (IRQEN)

CRGINT (RTIE)

TIM0TIE (C0I)

TIM0TIE (C1I)

TIM0TIE (C2I)

TIM0TIE (C3I)

TIM0TIE (C4I)

TIM0TIE (C5I)

TIM0TIE (C6I)

TIM0TIE (C7I)

TIM0TSRC2 (TOF)

TIM0PACTL (PAOVI)

TIM0PACTL (PAI)

SPICR1 (SPIE, SPTIE)

SCI0CR2

(TIE, TCIE, RIE, ILIE)

SCI1CR2

(TIE, TCIE, RIE, ILIE)

ATDCTL2 (ASCIE)

PIEAD (PIEAD7-PIEAD0)

PIER (PIER3-PIER0)

PIES (PIES6-PIES5)

CRGINT(LOCKIE)

CRGINT(SCMIE)

MC9S12XHY-Family Reference Manual, Rev. 1.01

56

Freescale Semiconductor

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