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S912XHY128F0VLM Datasheet, PDF (675/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers
Motor Controller (MC10B8CV1)
20.3.2.3 Motor Controller Period Register
The period register defines PER, the number of motor controller timer counter clocks a PWM period lasts.
The motor controller timer counter is clocked with the frequency fTC. If dither mode is enabled (DITH = 1,
refer to Section 20.4.1.3.5, “Dither Bit (DITH)”), P0 is ignored and reads as a 0. In this case
PER = 2 * D[10:1].
Offset Module Base + 0x0002, 0x0003
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
R0
0
0
0
0
P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 P0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 20-5. Motor Controller Period Register (MCPER) with DITH = 0
Offset Module Base + 0x0002, 0x0003
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
R0
0
0
0
0
0
P10 P9 P8 P7 P6 P5 P4 P3 P2 P1
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 20-6. Motor Controller Period Register (MCPER) with DITH = 1
For example, programming MCPER to 0x0022 (PER = 34 decimal) will result in 34 counts for each
complete PWM period. Setting MCPER to 0 will shut off all PWM channels as if MCAM[1:0] is set to 0
in all channel control registers after the next period timer counter overflow. In this case, the motor
controller releases all pins.
NOTE
Programming MCPER to 0x0001 and setting the DITH bit will be managed
as if MCPER is programmed to 0x0000. All PWM channels will be shut off
after the next period timer counter overflow.
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
675