S912XHY128F0VLM Datasheet, PDF (17/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Device Overview MC9S12XHY-Family
1.3.5 Internal Phase-Locked Loop (IPLL)
• Phase-locked-loop clock frequency multiplier
— No external components required
— Reference divider and multiplier allow large variety of clock rates
— Automatic bandwidth control mode for low-jitter operation
— Automatic frequency lock detector
— Configurable option to spread spectrum for reduced EMC radiation (frequency modulation)
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1.3.6 Clocks and reset generation(CRG)
• COP watchdog
• Real time interrupt
• Clock monitor
• Fast wake up from STOP in self clock mode
1.3.7 System Integrity Support
• Power-on reset (POR)
• System reset generation
• Illegal address detection with reset
• Low-voltage detection with interrupt or reset
• Real time interrupt (RTI)
• Computer operating properly (COP) watchdog
— Configurable as window COP for enhanced failure detection
— Initialized out of reset using option bits located in flash memory
• Clock monitor supervising the correct function of the oscillator
• Temperature sensor
1.3.8 Timer (TIM0)
• 8x 16-bit channels for input capture
• 8x 16-bit channels for output compare
• 16-bit free-running counter with 8-bit precision prescaler
• 1 x 16-bit pulse accumulator
1.3.9 Timer (TIM1)
• 8x 16-bit channels for input capture
• 8x 16-bit channels for output compare
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
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