S912XHY128F0VLM Datasheet, PDF (771/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Detailed Register Address Map
0x0020–0x002F Debug Module (S12XDBG) Map
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
0x0020
DBGC1
R
ARM
W
0
TRIG
reserved
BDM
DBGBRK reserved
0x0021
0x0022
0x0023
0x0024
0x0025
0x0026
0x0027
0x0027
0x0028¹
DBGSR
DBGTCR
DBGC2
DBGTBH
DBGTBL
DBGCNT
DBGSCRX
DBGMFR
DBGXCTL
(COMPA/C)
R TBF
W
R
reserved
W
R
0
W
R Bit 15
W
R Bit 7
W
R
0
W
R
0
W
R
0
W
R
0
W
0
TSOURCE
0
Bit 14
Bit 6
0
0
NDB
0
0
TRANGE
0
0
Bit 13
Bit 12
Bit 5
Bit 4
0
0
0
0
TAG
BRK
0
SSF2
TRCMOD
CDCM
Bit 11
Bit 10
Bit 3
Bit 2
CNT
SC3
MC3
SC2
MC2
RW
RWE
0x0028²
DBGXCTL
(COMPB/D)
R
W
SZE
SZ
TAG
BRK
RW
RWE
R
0
0x0029 DBGXAH
Bit 22
21
20
19
18
W
R
0x002A DBGXAM
Bit 15
14
13
12
11
10
W
R
0x002B DBGXAL
Bit 7
6
5
4
3
2
W
R
0x002C DBGXDH
Bit 15
14
13
12
11
10
W
R
0x002D DBGXDL
Bit 7
6
5
4
3
2
W
R
0x002E DBGXDHM
Bit 15
14
13
12
11
10
W
R
0x002F DBGXDLM
Bit 7
6
5
4
3
2
W
1 ^{This represents the contents if the Comparator A or C control register is blended into this address}
2 ^{This represents the contents if the Comparator B or D control register is blended into this address}
Bit 1
Bit 0
COMRV
SSF1
SSF0
TALIGN
ABCM
Bit 9
Bit 8
Bit 1
Bit 0
SC1
MC1
SC0
MC0
reserved COMPE
reserved COMPE
17
Bit 16
9
Bit 8
1
Bit 0
9
Bit 8
1
Bit 0
9
Bit 8
1
Bit 0
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
771