S912XHY128F0VLM Datasheet, PDF (594/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

256 KByte Flash Module (S12XFTMR256K1V1)
ECCRIX[2:0]
000
001
010
011
100
101
110
111
Table 18-23. FECCR Index Settings
FECCR Register Content
Bits [15:8]
Bit[7]
Bits[6:0]
Parity bits read from
Flash block
0
Global address
[22:16]
Global address [15:0]
Data 0 [15:0]
Data 1 [15:0] (P-Flash only)
Data 2 [15:0] (P-Flash only)
Data 3 [15:0] (P-Flash only)
Not used, returns 0x0000 when read
Not used, returns 0x0000 when read
Table 18-24. FECCR Index=000 Bit Descriptions
Field
Description
15:8
PAR[7:0]
ECC Parity Bits — Contains the 8 parity bits from the 72 bit wide P-Flash data word or the 6 parity bits,
allocated to PAR[5:0], from the 22 bit wide D-Flash word with PAR[7:6]=00.
6–0
Global Address — The GADDR[22:16] field contains the upper seven bits of the global address having
GADDR[22:16] caused the error.
The P-Flash word addressed by ECCRIX = 001 contains the lower 16 bits of the global address. The
following four words addressed by ECCRIX = 010 to 101 contain the 64-bit wide data phrase. The four
data words and the parity byte are the uncorrected data read from the P-Flash block.
The D-Flash word addressed by ECCRIX = 001 contains the lower 16 bits of the global address. The
uncorrected 16-bit data word is addressed by ECCRIX = 010.
18.3.1.15 Flash Option Register (FOPT)
The FOPT register is the Flash option register.
Offset Module Base + 0x0010
7
6
5
4
3
2
1
0
R
NV[7:0]
W
Reset
F
F
F
F
F
F
F
F
= Unimplemented or Reserved
Figure 18-21. Flash Option Register (FOPT)
All bits in the FOPT register are readable but are not writable.
MC9S12XHY-Family Reference Manual, Rev. 1.01
594
Freescale Semiconductor