S912XHY128F0VLM Datasheet, PDF (169/802 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Memory Mapping Control (S12XMMCV4)
3.3.2.7 Data FLASH Page Index Register (EPAGE)
Address: 0x0017
7
R
EP7
W
6
EP6
5
EP5
4
EP4
3
EP3
2
EP2
1
EP1
0
EP0
Reset
1
1
1
1
1
1
1
0
Figure 3-15. Data FLASH Page Index Register (EPAGE)
Read: Anytime
Write: Anytime
These eight index bits are used to page 1KB blocks into the Data FLASH page window located in the local
(CPU or BDM) memory map from address 0x0800 to address 0x0BFF (see Figure 3-16). This supports
accessing up to 256KB of Data FLASH (in the Global map) within the 64KB Local map. The Data FLASH
page index register is effectively used to construct paged Data FLASH addresses in the Local map format.
Global Address [22:0]
0
0 1 0 0 ^{Bit17 Bit16}
Bit10 Bit9
Bit0
EPAGE Register [7:0]
Address [9:0]
Address: CPU Local Address
or BDM Local Address
Figure 3-16. EPAGE Address Mapping
Table 3-9. EPAGE Field Descriptions
Field
7–0
EP[7:0]
Description
Data FLASH Page Index Bits 7–0 — These page index bits are used to select which of the 256 Data FLASH
array pages is to be accessed in the Data FLASH Page Window.
MC9S12XHY-Family Reference Manual, Rev. 1.01
Freescale Semiconductor
169