TCI6630K2L Datasheet, PDF (99/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

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TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
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Table 7-24. CIC0 Event Inputs — C66x CorePac Secondary Interrupts (continued)
EVENT NAME
EDMACC_0_TC_7_INT
QMSS_QUE_PEND_640
QMSS_QUE_PEND_652
UART_2_UARTINT
UART_2_URXEVT
UART_2_UTXEVT
UART_3_UARTINT
UART_3_URXEVT
UART_3_UTXEVT
SPI_0_INT0
SPI_0_INT1
SPI_0_XEVT
SPI_0_REVT
I2C_0_INT
I2C_0_REVT
I2C_0_XEVT
Reserved
QMSS_QUE_PEND_641
DBGTBR_DMAINT
MPU_12_INT
DBGTBR_ACQCOMP
MPU_13_INT
MPU_14_INT
NETCP_MDIO_LINK_INT0
NETCP_MDIO_LINK_INT1
NETCP_MDIO_USER_INT0
NETCP_MDIO_USER_INT1
NETCP_MISC_INT
TRACER_CORE_0_INT
TRACER_CORE_1_INT
TRACER_CORE_2_INT
TRACER_CORE_3_INT
TRACER_DDR_INT
TRACER_MSMC_0_INT
TRACER_MSMC_1_INT
TRACER_MSMC_2_INT
TRACER_MSMC_3_INT
TRACER_CFG_INT
TRACER_QMSS_QM_CFG1_INT
TRACER_QMSS_DMA_INT
TRACER_SEM_INT
PSC_ALLINT
MSMC_SCRUB_CERROR
BOOTCFG_INT
SR_0_PO_VCON_SMPSERR_INT
MPU_0_INT
QMSS_QUE_PEND_653
DESCRIPTION
EDMA3CC0 individual completion interrupt
Navigator transmit queue pending event for indicated queue
Navigator transmit queue pending event for indicated queue
UART_2interrupt
UART_2 receive event
UART_2 transmit event
UART_3 interrupt
UART_3 receive event
UART_3 transmit event
SPI0 interrupt0
SPI0 interrupt1
SPI0 transmit event
SPI0 receive event
I2C0 interrupt
I2C0 receive event
I2C0 transmit event
Navigator transmit queue pending event for indicated queue
Debug trace buffer (TBR) DMA event
MPU12 addressing violation interrupt and protection violation interrupt
Debug trace buffer (TBR) acquisition has been completed
MPU13 addressing violation interrupt and protection violation interrupt
MPU14 addressing violation interrupt and protection violation interrupt
Packet Accelerator 0 subsystem MDIO interrupt
Packet Accelerator 0 subsystem MDIO interrupt
Packet Accelerator 0 subsystem MDIO interrupt
Packet Accelerator 0 subsystem MDIO interrupt
Packet Accelerator 0 subsystem misc interrupt
Tracer sliding time window interrupt for DSP0 L2
Tracer sliding time window interrupt for DSP1 L2
Tracer sliding time window interrupt for DSP2 L2
Tracer sliding time window interrupt for DSP3 L2
Tracer sliding time window interrupt for MSMC-DDR3A
Tracer sliding time window interrupt for MSMC SRAM bank0
Tracer sliding time window interrupt for MSMC SRAM bank1
Tracer sliding time window interrupt for MSMC SRAM bank2
Tracer sliding time window interrupt for MSMC SRAM bank3
Tracer sliding time window interrupt for CFG0 TeraNet
Tracer sliding time window interrupt for Navigator CFG1 slave port
Tracer sliding time window interrupt for Navigator DMA internal bus slave port
Tracer sliding time window interrupt for Semaphore
Power & Sleep Controller interrupt
Correctable (1-bit) soft error detected during scrub cycle
Chip-level MMR Error Register
SmartReflex SMPS error interrupt
MPU0 addressing violation interrupt and protection violation interrupt
Navigator transmit queue pending event for indicated queue
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Memory, Interrupts, and EDMA for TCI6630K2L
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