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TCI6630K2L Datasheet, PDF (243/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip
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TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
Table 11-21. Reset Type Status Register Field Descriptions (continued)
Bit Field
11
WDRST3
10
WDRST2
9
WDRST1
Description
Reset initiated by Watchdog Timer[N]
• 0 = Not the last reset to occur
• 1 = The last reset to occur
8
WDRST0
7-3 Reserved
Reserved. Always reads as 0. Writes have no effect.
2
PLLCTLRST Reset initiated by PLLCTL
• 0 = Not the last reset to occur
• 1 = The last reset to occur
1
RESET
RESET reset
• 0 = RESET was not the last reset to occur
• 1 = RESET was the last reset to occur
0
POR
Power-on reset
• 0 = Power-on reset was not the last reset to occur
• 1 = Power-on reset was the last reset to occur
11.5.3.7 Reset Control Register (RSTCTRL)
This register contains a key that enables writes to the MSB of this register and the RSTCFG register. The
key value is 0x5A69. A valid key will be stored as 0x000C. Any other key value is invalid. When the
RSTCTRL or the RSTCFG is written, the key is invalidated. Every write must be set up with a valid key.
The Software Reset Control Register (RSTCTRL) is shown in Figure 11-15 and described in Table 11-22.
Figure 11-15. Reset Control Register (RSTCTRL)
31
17
16
15
0
Reserved
R-0x0000
SWRST
R/W-0x (1)
KEY
R/W-0x0003
Legend: R = Read only; -n = value after reset;
(1) Writes are conditional based on valid key.
Bit
31-17
16
Field
Reserved
SWRST
15-0 KEY
Table 11-22. Reset Control Register Field Descriptions
Description
Reserved
Software reset
• 0 = Reset
• 1 = Not reset
Key used to enable writes to RSTCTRL and RSTCFG.
11.5.3.8 Reset Configuration Register (RSTCFG)
This register is used to configure the type of reset (a hard reset or a soft reset) initiated by RESET , the
watchdog timer, and the Main PLL Controller’s RSTCTRL Register. By default, these resets are hard
resets. The Reset Configuration Register (RSTCFG) is shown in Figure 11-16 and described in Table 11-
23.
Figure 11-16. Reset Configuration Register (RSTCFG)
31
14
13
12
Reserved
R-0x000000
PLLCTLRSTTYPE
R/W-0 (2)
RESET TYPE
R/W-0 (2)
Legend: R = Read only; R/W = Read/Write; -n = value after reset
(1) Where N = 1, 2, 3,....N (Not all these outputs may be used on a specific device.)
(2) Writes are conditional based on valid key. For details, see Section 11.5.3.7.
11
4
Reserved
R-0x0
3
0
WDTYPE[N (1)]
R/W-0x00 (2)
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TCI6630K2L Peripheral Information and Electrical Specifications 243
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