TCI6630K2L Datasheet, PDF (195/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

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TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
9.2.3.19 Timer Input Selection Register (TINPSELx)
The Timer Input Selection Register selects timer inputs and is shown in the figures and table below.
Figure 9-31. Timer Input Selection Register (TINPSEL0) for Timer 0-Timer3
31
30
28
Reserved
TINPHSEL3
R-0
RW-0
23
22
20
Reserved
TINPHSEL2
R-0
RW-0
15
14
12
Reserved
TINPHSEL1
R-0
RW-0
7
6
4
Reserved
TINPHSEL0
R-0
RW-0
Legend: R = Read only; RW = Read/Write; -n = value after reset
27
Reserved
R-0
19
Reserved
R-0
11
Reserved
R-0
3
Reserved
R-0
26
24
TINPLSEL3
RW-0
18
16
TINPLSEL2
RW-0
10
8
TINPLSEL1
RW-0
2
0
TINPLSEL0
RW-0
Figure 9-32. Timer Input Selection Register (TINPSEL1) for Timer 4-Timer7
31
30
28
Reserved
TINPHSEL7
R-0
RW-0
23
22
20
Reserved
TINPHSEL6
R-0
RW-0
15
14
12
Reserved
TINPHSEL5
R-0
RW-0
7
6
4
Reserved
TINPHSEL4
R-0
RW-0
Legend: R = Read only; RW = Read/Write; -n = value after reset
27
Reserved
R-0
19
Reserved
R-0
11
Reserved
R-0
3
Reserved
R-0
26
24
TINPLSEL7
RW-0
18
16
TINPLSEL6
RW-0
10
8
TINPLSEL5
RW-0
2
0
TINPLSEL4
RW-0
Figure 9-33. Timer Input Selection Register (TINPSEL2) for Timer 8-Timer11
31
30
28
Reserved
TINPHSEL11
R-0
RW-0
23
22
20
Reserved
TINPHSEL10
R-0
RW-0
15
14
12
Reserved
TINPHSEL9
R-0
RW-0
7
6
4
Reserved
TINPHSEL8
R-0
RW-0
Legend: R = Read only; RW = Read/Write; -n = value after reset
27
Reserved
R-0
19
Reserved
R-0
11
Reserved
R-0
3
Reserved
R-0
26
24
TINPLSEL11
RW-0
18
16
TINPLSEL10
RW-0
10
8
TINPLSEL9
RW-0
2
0
TINPLSEL8
RW-0
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