TCI6630K2L Datasheet, PDF (28/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
www.ti.com
6.3 Terminal Functions
The terminal functions table (Table 6-2) identifies the external signal names, the associated pin (ball)
numbers, the pin type (I, O/Z, or I/O/Z), whether the pin has any internal pullup/pulldown resistors, and
gives functional pin descriptions. This table is arranged by function. The power terminal functions table
(Table 6-3) lists the various power supply pins and ground pins and gives functional pin descriptions.
Table 6-4 shows all pins arranged by signal name. Some pins have additional functions beyond their
primary functions. There are pins that have a secondary function and pins that have a bootstrap function.
Secondary functions are indicated with a superscript 2 (²), and bootstrap functions are indicated with a
superscript B (^B).
Table 6-5 shows all pins arranged by ball number.
For more detailed information on device configuration, peripheral selection, multiplexed/shared pins, and
pullup/pulldown resistors, see Section 9.2.
Use the symbol definitions in Table 6-1 when reading Table 6-2.
Table 6-1. I/O Functional Symbol Definitions
FUNCTIONAL
SYMBOL
DEFINITION
Internal 100-µA pulldown or pullup is provided for this terminal. In most systems, a 1-kΩ
resistor can be used to oppose the IPD/IPU.
IPD or IPU
For more detailed information on pulldown/pullup resistors and situations in which external
pulldown/pullup resistors are required, see the Hardware Design Guide for KeyStone II
Devices application report SPRABV0.
A
Analog signal
GND
Ground
I
Input terminal
O
Output terminal
P
Power supply voltage
Z
Three-state terminal or high impedance
Table 6-2 COLUMN
HEADING
IPD/IPU
Type
Type
Type
Type
Type
Type
Table 6-2. Terminal Functions — Signals and Control by Function
SIGNAL NAME
BALL
NO.
AVSIFSEL0^B
J2
AVSIFSEL1^B
J1
CSISC2_0_CLKCTL^B J3
CSISC2_0_MUX^B
H3
CSISC2_3_MUX^B
K26
BOOTMODE00^B
F27
BOOTMODE01^B
F26
BOOTMODE02^B
G29
BOOTMODE03^B
F28
BOOTMODE04^B
G27
BOOTMODE05^B
H30
BOOTMODE06^B
J26
BOOTMODE07^B
H26
TYPE IPD/IPU
IOZ Down
IOZ Down
IOZ Up
IOZ Down
IOZ Down
IOZ Down
IOZ Down
IOZ Down
IOZ Down
IOZ Down
IOZ Down
IOZ Down
IOZ Down
DESCRIPTION
AVS Interface
AVS interface select 0 (^B pin is a secondary function and is shared with TIMI0)
AVS interface select 1 (^B pin is a secondary function and is shared with TIMI1)
Common Serial Interface
Selection of reference clock sharing scheme for CSISC2_0 and CSISC2_1 (^B pin is a secondary function
and is shared with TIMO1)
Selection between AIL and JESD (^B pin is a secondary function and is shared with TIMO0)
Selection between SGMII and PCIe (^B pin is a secondary function and is shared with GPIO16)
Boot Configuration Pins
User-defined boot mode pins. (^B pins are secondary functions and are shared with GPIO[01:08])
28
Terminals
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