 English |
|
|
|
|
|
|
|
| TCI6630K2L Datasheet, PDF (93/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip | |||
| |||
| ◁ |
www.ti.com
TCI6630K2L
SPRS893E â MAY 2013 â REVISED JANUARY 2015
EVENT NO.
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
Table 7-23. System Event Mapping â ARM CorePac Interrupts (continued)
EVENT NAME
QMSS_INTD_2_HIGH_21
QMSS_INTD_2_HIGH_22
QMSS_INTD_2_HIGH_23
QMSS_INTD_2_HIGH_24
QMSS_INTD_2_HIGH_25
QMSS_INTD_2_HIGH_26
QMSS_INTD_2_HIGH_27
QMSS_INTD_2_HIGH_28
QMSS_INTD_2_HIGH_29
QMSS_INTD_2_HIGH_30
QMSS_INTD_2_HIGH_31
QMSS_INTD_2_LOW_0
QMSS_INTD_2_LOW_1
QMSS_INTD_2_LOW_2
QMSS_INTD_2_LOW_3
QMSS_INTD_2_LOW_4
QMSS_INTD_2_LOW_5
QMSS_INTD_2_LOW_6
QMSS_INTD_2_LOW_7
QMSS_INTD_2_LOW_8
QMSS_INTD_2_LOW_9
QMSS_INTD_2_LOW_10
QMSS_INTD_2_LOW_11
QMSS_INTD_2_LOW_12
QMSS_INTD_2_LOW_13
QMSS_INTD_2_LOW_14
QMSS_INTD_2_LOW_15
UART_0_UARTINT
UART_0_URXEVT
UART_0_UTXEVT
UART_1_UARTINT
UART_1_URXEVT
UART_1_UTXEVT
I2C_0_INT
I2C_0_REVT
I2C_0_XEVT
I2C_1_INT
I2C_1_REVT
I2C_1_XEVT
I2C_2_INT
I2C_2_REVT
I2C_2_XEVT
SPI_0_INT0
SPI_0_INT1
SPI_0_XEVT
SPI_0_REVT
SPI_1_INT0
DESCRIPTION
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second hi interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
Navigator second interrupt
UART0 interrupt
UART0 receive event
UART0 transmit event
UART1 interrupt
UART1 receive event
UART1 transmit event
I2C interrupt
I2C receive event
I2C transmit event
I2C interrupt
I2C receive event
I2C transmit event
I2C interrupt
I2C receive event
I2C transmit event
SPI interrupt
SPI interrupt
SPI DMA TX event
SPI DMA RX event
SPI interrupt
Copyright © 2013â2015, Texas Instruments Incorporated
Memory, Interrupts, and EDMA for TCI6630K2L
93
Submit Documentation Feedback
Product Folder Links: TCI6630K2L
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese