TCI6630K2L Datasheet, PDF (208/298 Pages) Texas Instruments – Multicore DSP+ARM KeyStone II System-on-Chip

TCI6630K2L
SPRS893E – MAY 2013 – REVISED JANUARY 2015
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Bit
18
17-16
15-14
13-10
9-7
6-4
3
2-0
Table 9-67. USB_PHY_CTL2 Register Field Descriptions (continued)
Field
Description
PHY_PC_
TXPREEMPPULSETUNE
HS Transmitter Pre-Emphasis Duration Control.
Controls the duration for which the HS pre-emphasis current is sourced onto DP or DM. It is
defined in terms of unit amounts. One unit of pre-emphasis duration is approximately 580 ps
and is defined as 1x pre-emphasis duration. This signal valid only if either
txpreempamptune[1] or txpreempamptune[0] is set to 1.
• 1 = 1x, short pre-emphasis current duration.
• 0 = 2x, long pre-emphasis current duration.
PHY_PC_TXPREEMPAMPTUNE HS Transmitter Pre-Emphasis Current Control.
Controls the amount of current sourced to DP and DM after a J-to-K or K-to-J transition.
PHY_PC_TXHSXVTUNE
The HS Transmitter pre-emphasis current is defined in terms of unit amounts. One unit
amount is approximately 600 µ;A and is defined as 1x pre-emphasis current.
• 11 = 3x pre-emphasis current.
• 10 = 2x pre-emphasis current.
• 01 = 1x pre-emphasis current.
• 00 = HS Transmitter pre-emphasis is disabled.
Transmitter High-Speed Crossover Adjustment.
PHY_PC_TXFSLSTUNE
Adjusts the voltage at which the DP and DM signals cross while transmitting in HS mode.
• 11 = Default setting.
• 10 = +15 mV
• 01 = -15 mV
• 00 = Reserved
FS/LS Source Impedance Adjustment.
Adjusts the low- and full-speed single-ended source impedance while driving high.
This parameter control is encoded in thermometer code.
• +1 = results in a -2.5% incremental change in threshold voltage level.
• -1 = results in a +2.5% incremental change in threshold voltage level.
PHY_PC_SQRXTUNE
Any non-thermometer code setting (that is 1001) is not supported and reserved.
Squelch Threshold Adjustment.
PHY_PC_OTGTUNE
Adjusts the voltage level for the threshold used to detect valid high-speed data.
• +1 = results in a -5% incremental change in threshold voltage level.
• -1 = results in a +5% incremental change in threshold voltage level.
VBUS Valid Threshold Adjustment.
Reserved
PHY_PC_COMPDISTUNE
Adjusts the voltage level for the VBUS valid threshold.
• +1 = results in a +1.5% incremental change in threshold voltage level.
• -1 = results in a -1.5% incremental change in threshold voltage level.
Reserved
Disconnect Threshold Adjustment.
Adjusts the voltage level for the threshold used to detect a disconnect event at the host.
• +1 = results in a +1.5% incremental change in the threshold voltage level.
• -1 = results in a -1.5% incremental change in the threshold voltage level.
Figure 9-53. USB_PHY_CTL3 Register
31
30
29
23
Reserved
PHY_PC_PCS_TX_SWING_FULL
R-0
R/W-1111000
22
17
16
11
10
5
4
0
PHY_PC_PCS_TX_DEEMPH_6DB
Reserved
PHY_PC_PCS_TX_DEEMPH_3P5DB
PHY_PC_LOS_LEVEL
R/W-100000
R-0
R/W-010101
R/W-01001
Legend: R = Read only; R/W = Read/Write, -n = value after reset
208 Device Boot and Configuration
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